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Luka Jankovic 2024-01-14 02:05:40 +01:00
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# vivado-make
Simple make system for simulating, synthesizing and routing VHDL projects as well as programming boards. Requires Vivado and doesn't rely on any other tools (apart from `make`, install with `scoop` on Windows)
Supports VHDL and the example is build for the Zybo-Z7 board.